Q3. [ABET Outcome "c"] Devign a 3-bit ALU which performs the functions given in the table below. The ALU inputs and outputs are given in the diagram on the right. The following constraint should apply to your design: - The design should contain three 1-bit ALU slices. Each slice can contain a single full adder block, two 2 -to-1 multiplexers, one 3 -to-1 multiplexer and basic logic gates