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Q3. For a certain computer system, assume 1) the main memory accesses take 100ns; 2) memory accesses are 25% of all instructions, 3) cache miss
Q3. For a certain computer system, assume 1) the main memory accesses take 100ns; 2) memory accesses are 25% of all instructions, 3) cache miss rate is 8.0%; 4) cache hit time is 0.80ns. a) Assuming the processor clock cycle time needs to be long enough to finish a single cache access, that's the maximum clock rate of the processor? (1 point) b) What is the AMAT of the processor? (1 point) c) If the processor is running at its maximum clock rate (computed from a previous question), what is the miss penalty (number of cycles) of the cache? (1 point) d) Assuming a base CPI of 1.0 without any memory stalls, what is the actual CPI? (2 points) e) Ifwe consider the addition of an L2 cache with a 4ns access time and 1% miss rate, and the processor is running at IGHz, what is the new CPI? (4 points)
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