Q4: (30) a. Design a 2 level SOP circuit that realizes function described below. b. Arrange the rows of the truth table so that like values of S1So are grouped, i.e. 4 rows where SSo=00, then the next 4 rows SSo-01, etc. For each block of 4 rows, the values for AB should be in natural binary order, i.e. 00, 01, 10, 11. For example, the first four rows are 0000 | 0100 | 1000 | 1100. Carefully map the output values Z from the original table to the new one. The two should be equivalent, with the rows shuffled in one Using the new table, implement the function using a single 4-to-1 MUX and a minimum number of gates How many gates are used in each implementation? c. d. 0 0 0 1 1 0 01 1 0 010 0 1 010 1 1 011 0 1 0 11 1 1 1 0 0 0 1 1 0 0 10 1 01 0 |1 1 01 10 11 0 00 1 10 10 1 1 1 0 0