Q5 (3 marks) In this question, we investigate the effect of block size on average memory access in a system with only one level of cache. The following table shows the miss rate versus block size of the cache. Assume that the memory system takes 80 clock cycles of overhead and then delivers 16 bytes every 4 clock cycles. Thus, it can supply 16 bytes in 84 clock cycles, 32 bytes in 88 clock cycles, and so on. Which block size has the smallest average memory access time assuming that hit time is 1 clock cycle (independent of block size)? why? Block size16 32 64128256 Miss rate 3.2 % | 3% | 2.6% | 2.3% | 1.9%