QUESTION 15 4 points Save Answer In logic design, a collection of data lines that is treated together as a single logical signal is called: A. Bus B. Combinational logic C. Trunk D. Sequential logic QUESTION 16 4 points Save Answer Match the following: Big Endian Little Endian A. The Most Significant Bit is first B. O, negative, and positive integers C. The Least Significant Bit is first D.O and positive integers only Unsigned Integers Signed Integers QUESTION 17 4 points Save Answer Fast Carry Lookahead is an example of the idea of compromise: speed vs complexity. True False QUESTION 18 4 points Save Answer Match the following: A Combinational Logic Sequential Logic A Synchronous System * Asynchronous System A. A logic system whose blocks do not contain memory B. A memory system that does not employ clocks C. A memory system that employs clocks D. A group of logic element that contain memory QUESTION 19 4 points Save Answer Signals written into state element do not need to be valid when the clock edge occurs in a synchronous system. True False QUESTION 20 4 points Save Answer Select all of the following that are types of memory elements: AND gates Registers Latches Flip-Flops