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Question 2 : 4 . 1 6 . 1 [ 5 ] 4 . 6 > As this instruction executes, what is kept in each

Question 2:
4.16.1[5]4.6> As this instruction executes, what is kept in each register located
between two pipeline stages?
4.16.2[5]4.6> Which registers need to be read, and which registers are actually
read?
4.16.3[5]4.6> What does this instruction do in EX and MEM stages?
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