Question 3 Consider a synchronous sequential circuit described as follows: - It has three flip-flops, type D, with outputs Q2Q1 and Q0 - The flip-flop with output Q0 has Q1 as input - The flip-flop with output Q1 has Q2 as input - The flip-flop with output Q2 has Q0 as input - The system has a global asynchronous reset - The circuit acts on the positive-edge of a clock named clk (a) Draw a full schematic diagram for the above sequential circuit. (7 marks) (b) Construct a state transition table for the circuit. (11 marks) (c) For a 3-bit binary output taken from the circuit as Q2Q1Q0, write the sequence of values generated as output for the first 10 clock cycles following a global reset. Explain the output sequence. (7 marks)