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Question 3 : In this exercise, we will examine how capacity affects overall performance. In general, cache access time is proportional to capacity. Assume that

Question 3:
In this exercise, we will examine how capacity affects overall performance. In general, cache access time is proportional to capacity. Assume that main memory accesses take 100 ns and that memory accesses are 38% of all instructions. The following table shows data for L1 caches attached to each of two processors, P1 and P2.
L1 Size L1 Miss Rate L1 Hit Time
P12 KB 9.0%0.50 ns
P24 KB 7.25%0.8 ns
a. Assuming that the L1 hit time determines the cycle times for P1 and P2, what are their respective clock rates?
b. What is the Average Memory Access Time for P1 and P2?
c. Assuming a base CPI of 1.0 without any memory stalls, what is the total CPI for P1 and P2?
Which processor is faster?Question 3:
In this exercise, we will examine how capacity affects overall performance. In general, cache access
time is proportional to capacity. Assume that main memory accesses take 100ns and that memory
accesses are 38% of all instructions. The following table shows data for L1 caches attached to each
of two processors, P1 and P2.
a. Assuming that the L1 hit time determines the cycle times for P1 and P2, what are their
respective clock rates?
b. What is the Average Memory Access Time for P1 and P2?
c. Assuming a base CPI of 1.0 without any memory stalls, what is the total CPI for P1 and P2?
Which processor is faster?
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