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Question 3 The average memory access time for a microprocessor with 1 level of cache 124 clock cycles - If data is present and valid

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Question 3 The average memory access time for a microprocessor with 1 level of cache 124 clock cycles - If data is present and valid in the cache. It can be found in 1 clock cycle-If data is not found in the cache, O clock cycles are needed to get it from off-chip memory, Designers are trying to improve the average memory access time to obtain a 65% improvement in average memory access time and are considering adding a 2nd level of cache on-chis. This second level of cache could be accessed in clock cycles - The addition of this cache does not affect the first level cache's access patterns or hit times - Off- chip accesses would still require 80 additional Cs. To obtain the desired speedup, how often must data be found in the 2nd level cache

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