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Register File HLSM Inputs: Btn0 (bit), Btn1 (bit), Btn2 (bit), Switch (8 bits) Outputs: HexDisp (16 bits), W_Addr (4 bits), R_Addr (4 bits) Local
Register File HLSM Inputs: Btn0 (bit), Btn1 (bit), Btn2 (bit), Switch (8 bits) Outputs: HexDisp (16 bits), W_Addr (4 bits), R_Addr (4 bits) Local Storage: RegFile(16) (8 bits), W_AddrReg (4 bits), R_AddrReg (4 bits), Sum Reg (16 bits), HexDispReg (16 bits) Btn2' Btn2' Btn1 Btn0' Ld_Addr_Reg Btn0 Idle W_AddrReg:= Switch(7:4) Disp_RegFile R_AddrReg Switch(3:0) HexDispReg := Btn1*Btn0' Btn2 RegFile(W_AddrReg) & Write_Data RegFile(R_AddrReg) Btn2*Btn1'*Btn0' RegFile(W_AddrReg) := Switch(7:0) Disp_Sum R_AddrReg=15 R_AddrReg
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Logic And Computer Design Fundamentals
Authors: M. Morris Mano, Charles Kime, Tom Martin
5th Edition
0133760634, 978-0133760637
