Risk Assessment: Low Introduction: The AM architecture supports a variety of arithmetic and logical instructions. These instructions involve only the processor and general-purpose registers. So, arithmetic and logical operations modify the contents of general-purpose registers only. The general syntax for arithmetic/logic instructions is as follows: Opcode Rd, Operandi, Operand2 Opcode is replaced with the desired operation (ADDS, SUBS, MULS, ANDS..........). Rd is the destination register where the result is stored Operandl is the flexible 1" operand. It can be a register or an immediate value. Operand is the flexible 2nd operand (optional). It can be a register or an immediate value or (a register or an immediate value for an arithmetic shift, ASRS operation). (Note: The number of bits in the immediate value varies depending on the operations - refer the instruction set summary for more details). The suffix S in the opcode is optional. If S is specified, the condition flags are updated on the result of the operation (e.g. ADD instruction doesn't update the flag bits in CPSR register) The logical operations are commonly used to set (make a bit 1) or clear/mask (make a bit a 0) a specific bit in a register and shift left or right the content of a register. The list of commonly used arithmetic and logic instructions is shown in Table ! Arithmetic Instructions Instructions Descriptions ADD R1, R2 Add contents of Rland R2, store result in RI. Flags are not updated ADDS RI, R2, R3 Add contents of R2 and R3, store result in RI and update flags ADDS RI, R2, #data3 Add a 3-bit data to contents of R2. store result in RI and update flags ADCS RI, R2 Add contents R1 and R2 with carry, store result in R1 and update flags. Add with carry allows adding numbers larger than 32 bits SUBS RI.R2, R3 Subtract contents of R3 from R2, store result in RI and update flags SUBS RI, R2, #data3 Subtract a 3-bit data from contents of R2, store result in R1 and update flags SBCS RI, RI, R2 Subtract R2 from Rl with carry (Borrow), store result in RI and update flags. MULS R1, R2, RI Multiply contents of R2and RIstore result in RI and update flags. CMP RO, RI Compare contents of RO with contents of R1 and update flags CMP RO, #data8 Compare contents of RO with an immediate 8-bit data and update flag Logic Instructions ANDS RIRI,R2 AND the contents of Ri with R2, store result in RI and update flags ORRS RIRI.R2 OR the contents of RI with R2, store result in RI and update flags EORS R1 R1,R2 EXOR R1 and R2, store result in RI and update flags BICS RI, RI.R2 Bitwise Clear - AND R1 with NOT R2, store result in R1 and set flags. LSLS RI, R2. #datas Shift R2 left by a value specified by a 5-bit data through C. store result in RI LSRS RI, R2, #data5 Shift R2 right by a value specified by a 5-bit data through C, store result in RI RORS RI, RI, R2 Rotate right RI by the value equal to the least significant byte of R2 Note: Refer the instruction set of ARM for the full list of Arithmetic and logic instructions Table 1: List of commonly used arithmetic and logical instructions Lab Tasks Procedure 1. Create a new uVision project and name it as Lab (Na) (last 4 digits of ID NO. 2 For each task use the standard template and create a "." file for your program, and follow the below steps to complete the task; Save each task with the file name "Lab (Na) Task (No. b. Execute the program step by step (one instruction at a time). c. Tabulate the contents of relevant registers and memory location in each step. d. Take screenshots of register and memory windows showing the results. Task 1 Copy the program from the test file (Lab2_Taskl) into the text editor of Keil u Vison. Execute the program step by step in sequence and complete the table 1. This task demonstrates the operation of basic arithmetic and logical operations. Comments Status of lags NZ CV Instruction Contents of Registers memory in Hex MOVS R0.00 RO LDR R1.-0x50 RI- LDR R2,"x0125 R2- LDR R3.-OXFF R3- MSR XPSR.RO RO- ADDS R2.RI SUBS R1,R2 MULS R3.R2.83 RI- R2- RI- R2- R2- R3- R2 R3 CMP R3 R2 CMP RI.N0x40 RI- MSR XPSR.RO RO ANDS RIRI.R2 RI- R2 RI- R2- ORRS RIRI.R2 RIRIR EORS RIRI.R2 RI- R2- RI R2- BICS RIRIR2 LSLS R1,R2,13 LSRS RI.R2.16 RI- R2- RI- R2- RI- R2- RORS RIRI,R2 , Table 1: Results of Task 1 Task 2 A two byte number (OxWX YZ) is stored in register RO. Write a program to; a) Separate the nibbles of this given number and store them in consecutive memory locations as OZ. OY, OX and OW starting from the address 0x20000000 b) Change the second byte (WX) of the number in RO to PQ without changing the least significant byte (YZ) and store the new number (OxPQYZ) in the same register (RO). Task 3 Write a program to add five 32-bits unsigned numbers stored in consecutive locations in memory pointed by the label "Numbers and store the result in memory starting from location pointed by the label "Sum Post Lab Assignments Post Lab Task 1 Write a program to load the register RO with a 16-bit unsigned number (OxOOOXXXXX) and perform the following operations using ONLY one logical instruction in each step (Note: For each step the content of RO is always the same as the initially loaded number) a. Multiply the content of RO by 2 and store the result in R2 b. Mask the first nibble of the content of RO and store the result in R4 c. Set all bits in the register RO to 1 and store the result in R5 d. Reset all bits in the register RO to 0 and store the result in R6 e. Compliment the content of RO and store the result in R7. Post Lab Task 2: Write a program to find the value of y in the given polynomial for a given value of x and store the result in RO, y=3x-7x410X-11 Risk Assessment: Low Introduction: The AM architecture supports a variety of arithmetic and logical instructions. These instructions involve only the processor and general-purpose registers. So, arithmetic and logical operations modify the contents of general-purpose registers only. The general syntax for arithmetic/logic instructions is as follows: Opcode Rd, Operandi, Operand2 Opcode is replaced with the desired operation (ADDS, SUBS, MULS, ANDS..........). Rd is the destination register where the result is stored Operandl is the flexible 1" operand. It can be a register or an immediate value. Operand is the flexible 2nd operand (optional). It can be a register or an immediate value or (a register or an immediate value for an arithmetic shift, ASRS operation). (Note: The number of bits in the immediate value varies depending on the operations - refer the instruction set summary for more details). The suffix S in the opcode is optional. If S is specified, the condition flags are updated on the result of the operation (e.g. ADD instruction doesn't update the flag bits in CPSR register) The logical operations are commonly used to set (make a bit 1) or clear/mask (make a bit a 0) a specific bit in a register and shift left or right the content of a register. The list of commonly used arithmetic and logic instructions is shown in Table ! Arithmetic Instructions Instructions Descriptions ADD R1, R2 Add contents of Rland R2, store result in RI. Flags are not updated ADDS RI, R2, R3 Add contents of R2 and R3, store result in RI and update flags ADDS RI, R2, #data3 Add a 3-bit data to contents of R2. store result in RI and update flags ADCS RI, R2 Add contents R1 and R2 with carry, store result in R1 and update flags. Add with carry allows adding numbers larger than 32 bits SUBS RI.R2, R3 Subtract contents of R3 from R2, store result in RI and update flags SUBS RI, R2, #data3 Subtract a 3-bit data from contents of R2, store result in R1 and update flags SBCS RI, RI, R2 Subtract R2 from Rl with carry (Borrow), store result in RI and update flags. MULS R1, R2, RI Multiply contents of R2and RIstore result in RI and update flags. CMP RO, RI Compare contents of RO with contents of R1 and update flags CMP RO, #data8 Compare contents of RO with an immediate 8-bit data and update flag Logic Instructions ANDS RIRI,R2 AND the contents of Ri with R2, store result in RI and update flags ORRS RIRI.R2 OR the contents of RI with R2, store result in RI and update flags EORS R1 R1,R2 EXOR R1 and R2, store result in RI and update flags BICS RI, RI.R2 Bitwise Clear - AND R1 with NOT R2, store result in R1 and set flags. LSLS RI, R2. #datas Shift R2 left by a value specified by a 5-bit data through C. store result in RI LSRS RI, R2, #data5 Shift R2 right by a value specified by a 5-bit data through C, store result in RI RORS RI, RI, R2 Rotate right RI by the value equal to the least significant byte of R2 Note: Refer the instruction set of ARM for the full list of Arithmetic and logic instructions Table 1: List of commonly used arithmetic and logical instructions Lab Tasks Procedure 1. Create a new uVision project and name it as Lab (Na) (last 4 digits of ID NO. 2 For each task use the standard template and create a "." file for your program, and follow the below steps to complete the task; Save each task with the file name "Lab (Na) Task (No. b. Execute the program step by step (one instruction at a time). c. Tabulate the contents of relevant registers and memory location in each step. d. Take screenshots of register and memory windows showing the results. Task 1 Copy the program from the test file (Lab2_Taskl) into the text editor of Keil u Vison. Execute the program step by step in sequence and complete the table 1. This task demonstrates the operation of basic arithmetic and logical operations. Comments Status of lags NZ CV Instruction Contents of Registers memory in Hex MOVS R0.00 RO LDR R1.-0x50 RI- LDR R2,"x0125 R2- LDR R3.-OXFF R3- MSR XPSR.RO RO- ADDS R2.RI SUBS R1,R2 MULS R3.R2.83 RI- R2- RI- R2- R2- R3- R2 R3 CMP R3 R2 CMP RI.N0x40 RI- MSR XPSR.RO RO ANDS RIRI.R2 RI- R2 RI- R2- ORRS RIRI.R2 RIRIR EORS RIRI.R2 RI- R2- RI R2- BICS RIRIR2 LSLS R1,R2,13 LSRS RI.R2.16 RI- R2- RI- R2- RI- R2- RORS RIRI,R2 , Table 1: Results of Task 1 Task 2 A two byte number (OxWX YZ) is stored in register RO. Write a program to; a) Separate the nibbles of this given number and store them in consecutive memory locations as OZ. OY, OX and OW starting from the address 0x20000000 b) Change the second byte (WX) of the number in RO to PQ without changing the least significant byte (YZ) and store the new number (OxPQYZ) in the same register (RO). Task 3 Write a program to add five 32-bits unsigned numbers stored in consecutive locations in memory pointed by the label "Numbers and store the result in memory starting from location pointed by the label "Sum Post Lab Assignments Post Lab Task 1 Write a program to load the register RO with a 16-bit unsigned number (OxOOOXXXXX) and perform the following operations using ONLY one logical instruction in each step (Note: For each step the content of RO is always the same as the initially loaded number) a. Multiply the content of RO by 2 and store the result in R2 b. Mask the first nibble of the content of RO and store the result in R4 c. Set all bits in the register RO to 1 and store the result in R5 d. Reset all bits in the register RO to 0 and store the result in R6 e. Compliment the content of RO and store the result in R7. Post Lab Task 2: Write a program to find the value of y in the given polynomial for a given value of x and store the result in RO, y=3x-7x410X-11