S 28%) You are told that on average, ARM processors see 30% load/store 20% branch, and i tio logie instructions. You are also given that load store instructions take 3 yokes bwisch instructions take 2 cycles and arithmetic/logic instructions take 1 cycle. You we considering the possible hardware optimizations o Reduce execution of load store to 2 cycles. But this reduces clock speed by 20% 0 Reduce execution of branch instructions to l cycle. But this reduces clock speed Por each optimization calculate the overall performance improvement achieved. S 28%) You are told that on average, ARM processors see 30% load/store 20% branch, and i tio logie instructions. You are also given that load store instructions take 3 yokes bwisch instructions take 2 cycles and arithmetic/logic instructions take 1 cycle. You we considering the possible hardware optimizations o Reduce execution of load store to 2 cycles. But this reduces clock speed by 20% 0 Reduce execution of branch instructions to l cycle. But this reduces clock speed Por each optimization calculate the overall performance improvement achieved