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. S R f. Assume a positive edge triggered SR flip flop initial Q value is 0, add the waveform of Q below. clk Q.

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S R f. Assume a positive edge triggered SR flip flop initial Q value is 0, add the waveform of Q below. clk Q. S Q CLK SR Flip Flop R Q' RESET g. Briefly explain about asynchronous counters also design a sign an up/down asynchronous MOD-8 counter using positive edge triggered JK flip-flops with the design requirement being that the clock signal is applied to the 1st flip flop. h. A digital electronic system consists of four inputs (A, B, C and D) and a single output (Q). The system will produce a 1 at the output only if the input is a power of 2. i. Determine the truth table of the digital system and derive the corresponding Boolean equation (sum of products). ii. Draw the corresponding K-map and write the Boolean equation under its simplest form (use further simplifications if required). Then, draw the corresponding logic circuit using 2-input gates only.

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