Physics Questions and Answers September 23, 2020

Why don't two magnetic lines of force intersect each other?

for the equation. the minimise glven expression of ind y (AB) (AB) (AB) (A B)

The Gini coefficients of four countries in 2019 are as follows g(x) 0,43 g(Y) 0,37 g(Z) 0,41 and g(W) 0,35. Other things being equal, can you guess which country has the least sagged Lorenz curve a. Country W b. Country X c. Country Z d. Country Y

find the minimise expression. equation equation of y ABC ABC ABE ABC. the given

the find the minimise expression of quation y ABC ABC ABC 0 ABC given

from the expression by A 0 0 given table find the output minimize using sop. 1 1 B 0 1 1

from the expression given truth table of output. find the minimise, 000 . 010 01 L 00 0 1 1.. LL Q 0 0 1 www

from the minimise given diagram region by using sop. expression diagram find the output ( for the shaded, 10 tolo topis AB AB 0 0 AB de AB AB 0 op A8 I

given function f(A, B.6) m (0,2,3,6) Em equivalent for the B, C) find Hu POS...

expression of (A.B.C.) A BC conanical form of of of min terms. for the givennterm represents Sop. And Identify. prsents. no..

for the minterms f(A, B, C, D) ACD f (A, B, C, D) Bc5 given function find the number of

find the dual of y AB BC. Ac..

find the dual of given expression y (AB) (BC) (AC). SON

dual or not Check wheather self dual y A B B C C AC

for the given minimise Boolean switch diagram find the off A 7 expression. B A A 132

Calculate output y for two different which sheron given for A3 A TO B DIO D cases. HD DDDY (10) F,0 G,0 E 1,1

Impliment Y ABCD by using minimum number of two input NAND gate.

Impliment y AB CD E

for the given expression given expression by using minimum number gates. Y (AB) (CD) two input NOR of

given expression Y (AB). (CD). E minimum two input of NOR gates. minimum number for the by using using of

Identify the A B logic gate DI D V

for the circuit. given for output expression gate by using by using expressio will F A o Ba diagram is I replace NAND gate. the resultant be (6) F V (c) Fo (el) F (AB) shown in figure shown every logic. CCD) F (AB) (CD) (

Replace every gate by NOR gate NOR gate expression will be (6) F V (0) Fo the resultant. (d) F

for the logic gate circuit given diagram identify the oy

for the logic gate given circuit diagram identify the

Impliment H.A. by using minimum number of input. NAND Gate.

Lalrite the expression for 2bit Comparator.

Jalrite the expression for 8bit Comparater. APREN

Impliment of nand full adder by using gate... minimum numbe

find three the output minimise input. input functic of inputs o highe are expression for functions if majority number high I out pict assumed

for the previous ques. output is when minority number are of inputs high Thigh..

find the off minimise expression for output if input. is at least 3 and maximum is is t 6

find the output minimise expression for the given Mux circuit. UN J C Do k DI D D3 ALISE A B O i J.J. Y ABDot ABD ABD ABB

for the given circuit dragram find minimise expression. 1 D DI Dz Dz. 14000 L8O. the 1 A B D HAB DATABD TAB

C for the expression. O E given circuit Do 12 DZ Dz dragsam find minimise (4x1) Mux A B O ABC ABC ABC ABC Y (

find the output expression y.

find the output minimise oc (CC) D T Dz A B O expression... Y ABCB.) AB.O

Impliment half adder by using 2x1 mux

Impliment half subtractor by using. 2x1 Mux.

2x1 Mux impliment single bit by comprator. Using

Impliment 4x1 Mux by using 2x1 Mux.

Impliment f(a,b) m (0,1,3) by using and 2x1 mux..

given function of (a, b, c) Em (0,2,3,6,7, function by using 4x1 Mux. l for the impliment the function by using U

Impliment half adder by using 2x4 Decode

2x4 decoder impliment single. By using bit comprator.

By using funktion G ma 2x4 decoder impliment the of (A,B) m (0,1,8)

Impliment full adder by using 8x8 decoder

Impliment full subtrator by using 3xd clecode

Find the output. Q XL YL Do for Do the given circuit.

Mod4 up counter by using edge triggered flipflop. Ve

Design a Mod 8 up counter edge triggered J.K f.F.. 00 by using negative

Mod8 UP counter by using using JK FF Ve edge trigger.

Mod8 down counter by using Design a positive edge triggered L FATTIMI

a Mod 8 down counter by using JK JK. Design negative edge triggered.

counter by using negative. Design Mod 6. up.. edge triggered J.K, flipflop...

for the given Mod of Qo k. given circult the Counter 52, 0 k O 1 diagram 2 J k find the k 23. 1

for loop the given equation. circuit diagram write A han,E ww R I 1 R3 2 12 www. Rq. 2 Rs E 3

for the given www 2.2. 32 (1) in ZV circuit diagram find IN I2I3 2 Amp. J3K 31 12V www 42 I2 27 22. BV (

for the given 1, 12, 13 m Circuit SV diagram find 3.R 12 6522 (12 1) 2V (333) D OSV (11)0,7) 32R (12) 22 13V ( 1211) the currents 1. 2 2.r

given Op Amp Network waveform.. rvsat 16V for the Output VSint Vo Veat 15V draw the Shade

for the ave forom... giver.. 2 circuit diagram draw the output 15V Vsat F Veat 15V Bis

for the given outpul wave form 2 Sint Volc circuit diagram draw draw the Vsat 15V Vset 15V

for the 200 given OpAmp network find the lok lok 2.K ww lov ska MW Io current. Io 7 IK ww 8V

for the No. given. ww Vin Nin R circuit diagram find output voltage SR 1 2.R www Fot www R No N0

Find Vo

for the given output valtage. en OpAmp network ZK www 1mH. IME H1 IV D.C. 3k determine 9 BQ 0 10V IV ELV

find the output voltage fox given. Lumm I LAN Vin svdc lok ww look No circuit.

for the given R Vino tim I network R wit calculate the. Vou 3) Vo valtage gain.

1 for the given. Vin S Imm ww IL (b) network find the R Vy Aw 16 RT R Var www 10 voltage gain. R ww t 62 11 M 23

for the given Op Amp determine the of voltage. m 3V Sva www J Tols Vn 20k Zu V

Find the output voltage mi 30k 3.V0 700 1 R 20223 119 401 M A

for the Voltage. 3022 700 given 20k Va circuit. bok Jok diagram determine off

for the given... all loop corrents. 13 2N Game 652 www 115V TI wint 110v 132 Di5) I cirewit (J12) diagram. SR II 152 am. Determine the I 2 52

for the given circuit diagram calculate voltage gearin. R www. V

for the given circuit diagram. Mw lok year lok... wwwww VI www Vin sint 2 2 sin (t25) 2 sin 45 2 12 Sin (t45) Voy Va C1 E Sin (95) 1 Jwc Vo calculate No

for the maximum... V Vi R 21. given circuit diagram find the output phase difference bw op and ip. Vi R V www. 2 R L ywc Vo quat

AN for the gain... Vin given R circuit Alv diagram 11 Jwc Vo calculate the voltage

for the of voltage gain output and circuit diggesam calculate. mag and phase difference blu input. 0.00 UF agnitude 11 ven circuit Vin1 f lott luk Vo 0 1. 2 a (b) 10, (c) 10, 7 (d) 52, 372

find the vellege gain of cercuit, R Nin t OFF wc the O V gruen 6

for the gruven filter. circuit obragram identify the,ViA O R J wwx R Vou ft GL juc R 12

for the given circuit R ww WW the filter. R Vin VM JWC ZR V. diagram identify

for the given circuit diagram identify the type of filter I and culculate the cut off frequency I.K. Vin 1.k ww Rlok C4 C 27 V REAS weg

Identify Vin the R V filter and a cut off frcq. Rf R 1

for the given. filter R Vin Len circuit AM Rf 5 ( Lf diagoram identify the 39

for the given. circuit given. type of filter. Rf o diagram identify the LL. P. F.

for the given circuit diagram calculate off voltage L.P.E. Vin R wwww 1 Vo

Calculate crutput voltage R V0 R V a tim 3 R. 0 eff MAN F t 2

inverting Summing amplifier... An output. No 0 1.V 0.2 0.4 V. calculate R, R, Rz. if Ry1 10k

for the given circuit diagram calculate olp voltage R www. R 10 m ve a hum V3 Jo Van SI I3 mot Is 4

for the current I. 20 )k wwww II given... circuit diagram calculate. www. K 12 I 36 4 2.K 1.53 Her...

for the given... the current branch.. 5V 265 AO circuit througth 3K WWW.F wiv Sk diagram calculate each and 3214 I H 3 every 20

Calculate the value of a if w 1000 Rad Bee c R looks, h, is load and phase shift bdween.. Vo and Vi. 270. Vin Vin I1 www. R Vou 4 c1 jwc

Find Vo.

v www V XII Van SIK S www. 2k ovo

Calculate the voltage gain V 1 Y Iz ww R R ST R Iz No2 R w Noi R SR (1) R www t 1. 0

for the given circuit circuit Vo 4 k F I Vin o dia diagram calculate op voltuge off V

Calculate No Vo I IV R www 1 V

for the current. E iven circuit. given www F3 wwww V CA t Id diagram wwww IL F determine Vi. eft in terms ovo

Calculate IL in R. V a V. T R IT Va TVm RE terms www f WWW J2 Vi

for the given circuit diagram calculate the closed loop voltage gain if open Joop gain AOL 5.0 Tok V IK MAAAA Vo

for the overall input output. figure Vi o given circuit diagram calculate resistance. resistance with feed back shown in overall 17 www K p 3k ov AOL 10 Rin loks ho2k 9 Rin Ro