Semiconductor Memories Question

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For the column select subcircuit of the column decoder circuit (P&E), Figure 4.3, page 103, Bits 4 and 5 are predecoded. . What are the correct column address signais for the pass transistors (true on complement) and the correct index of the LCA45* signal for columns 0, 19, and 27? b. Draw the predecode logic schematic for bits 4 and 5 to generate CA45*forn 0 to For the column select subcircuit of the column decoder circuit (P&E), Figure 4.3, page 103, Bits 4 and 5 are predecoded. . What are the correct column address signais for the pass transistors (true on complement) and the correct index of the LCA45* signal for columns 0, 19, and 27? b. Draw the predecode logic schematic for bits 4 and 5 to generate CA45*forn 0 to