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Some portion of cache system A represented below. The system is byte - addressable and the block size is one word ( 4 bytes )

Some portion of cache system A represented below.
The system is byte-addressable and the block size is one word (4 bytes). The tag and line number are represented with a binary numbers. The contents of words in the block are represented with hexadecimal.
Tag
Line Number
Word within block
00
01
10
11
10100001001001
01101101
2016
6116
C116
2116
10100001001001
01101110
3216
7216
C216
D216
10100001001001
01101111
4216
8216
4116
A216
10100001001101
01110000
E216
9216
5216
B216
1. If the CPU requests to read memory address A125 BA, what data does the CPU receive?
[ Select ]
2. If the CPU requests to read memory address A135 C2, what data does the CPU receive?
[ Select ]Some portion of cache system A represented below.
The system is byte-addressable and the block size is one word (4 bytes). The tag and line number are represented with a binary numbers. The contents of words in the block are represented with hexadecimal.
Tag
Line Number
Word within block
00
01
10
11
10100001001001
01101101
2016
6116
C116
2116
10100001001001
01101110
3216
7216
C216
D216
10100001001001
01101111
4216
8216
4116
A216
10100001001101
01110000
E216
9216
5216
B216
1. If the CPU requests to read memory address A125 BA, what data does the CPU receive?
[ Select ]
2. If the CPU requests to read memory address A135 C2, what data does the CPU receive?
[ Select ]

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