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Sotre portion of cache system B represented a 2 waysetassociative mapping cache system. The system is byte addressable and the block size is one word

Sotre portion of cache system B represented a 2 waysetassociative mapping cache system. The system is byte addressable and the block size is one word (4 byted. The tag and set number are represented with a binary numbers. The contents of words in the block are represented with headecimal Tag Set Number Word within block 00 bi 1011101000010010010110110120615111100010010010110110115241216-21621110100001001001011011101423122 it 11000100110101101110525215212.1010000100100105101111 ko 111100010010010110111110241212402110100001001001011100004282 Bise 12111110010011010111000052 W2521210100010010010111000161211110010010010111000152220210100010010010111001012111110001001011110010521 zo B21010000100100101110010|A216|82164116|A21611110001001101011100105216192165216 B2161. What is the size of the main memory for cache system B?2. What is the size of cache memory? 3. If we request memory read from memory address F135 C3, what data do we reac 4. If we request memory read from memory address A125 BA, what data do we read? 5. If we access memory as the following order in cache system B: A1 FF BB B1 FF B8 A1 FF B8 B1 FFB8 A1 FFB8 BIFF BB how many cache missles) would occur for the data request?

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