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Suppose a computer has an atomic swap instruction, defined as follows: Swap (var1, var2): tmp = var 1 ; var1 = var2 ; var2 tmp

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Suppose a computer has an atomic swap instruction, defined as follows: Swap (var1, var2): tmp = var 1 ; var1 = var2 ; var2 tmp ; In the above, tmp is an internal register. (a) Usin cesses. Do not worry about the eventual entry property. Describe clearly how your solution works and why it is correct. (b) Modify your answer to (a) so that it will perform well on a multiprocessor system with caches. Explain what changes you make (if any) and why

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