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. Suppose a CPU has this instruction: ADDI 24,50,3, where the first two operands describe the addends and the third tells where the sum should
. Suppose a CPU has this instruction: ADDI 24,50,3, where the first two operands describe the addends and the third tells where the sum should be stored. Suppose that indirect addressing is used for all three operands. If the memory looks like the following, what would be the result, and where would it be stored? Address Data
2: 0010 0100
3: 0000 0010
4: 0000 0110
23: 0000 0001
24: 0011 0011
25: 0101 0010
49: 0101 0000
50: 0001 0111
51: 0000 1000
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