Suppose a program makes a sequence of memory references that cause the following memory blocks to be read, in this order: A, B, D, E, A, C, E, A, C, B, E, A. The CPUs cache has 4 blocks and uses LRU as the replacement policy. Show the state of the cache after each memory block access, indicating the age of a block by giving the sequence number of when the block was last referenced. Begin the sequence numbers at 1 for the first memory reference.