Suppose in a demand paging system page size is 1 KB (1024 bytes). A process P running in this system currently has the following page table:

Consider that the process generates references to the following 16 memory addresses( first read in row major order and then move to the next line):

1016 3074 4096 5100 1024 5104 1028 4096

3145 1150 3000 3072 2048 6146 6150 3076

a) What is the list of page references for the given memory addresses?

b) What is the page fault rate when the system uses LRU page replacement algorithm and the processes is given only three frames in pysical memory?

c) show how Denning's Working Set (DWS) model with a window size = 3 can be used to control thrashing for this process? ( shows the content of the working set after each reference (assume the working set is initially empty)). Explain.

Page no Frame no Valid/invalid Reference Bit 0 1 0 O 1 2 1 0 N 0 0 3 1 1 0 4 0 0 0 5 0 6 0 0 0 7 0