Suppose you are required to design a digital system that implements the function, f=2x + 2y by using a datapath functional block diagram (FBD) given in Figure 1. The ALU operations are controlled by the Op signal as follows: Op= 0, F = A; Op = 1, F= A+B. You need to: 1. Fill in the RTL-CS table for the given equation. 2. Write the Verilog Code for DU. 3. Draw the functional block diagram (FBD) for the CU based on your derived RTL-CS table. 4. Write the Verilog Code for your CU. Data in sell Lda ud Regi Ld2 St cik ld Reg2 dk sel Op 4 Operation Op = 0,FEA Op 1, F-A+B En Date out RTL code Signal activated Control Vector (CV) Ld2 Sel2 Ld1 Sel1 Op En Suppose you are required to design a digital system that implements the function, f=2x + 2y by using a datapath functional block diagram (FBD) given in Figure 1. The ALU operations are controlled by the Op signal as follows: Op= 0, F = A; Op = 1, F= A+B. You need to: 1. Fill in the RTL-CS table for the given equation. 2. Write the Verilog Code for DU. 3. Draw the functional block diagram (FBD) for the CU based on your derived RTL-CS table. 4. Write the Verilog Code for your CU. Data in sell Lda ud Regi Ld2 St cik ld Reg2 dk sel Op 4 Operation Op = 0,FEA Op 1, F-A+B En Date out RTL code Signal activated Control Vector (CV) Ld2 Sel2 Ld1 Sel1 Op En