Suppose you have a 32-bit MIPS processor. For each of the two following cache config- urations, how many bits are used for the tag field, the set field (also called the index), and the byte offset field of the address? (a) A direct mapped cache with capacity 2048 bytes and block size 8 bytes. (b) A 4-way set associate cache with capacity 4096 bytes and block size 16 bytes