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T Fa. MSP430 is a 16-bit Complex Instruction Set Computer (CISC) T Fb. MSP430 has 16 general purpose registers T Fc. We should leave the
T Fa. MSP430 is a 16-bit Complex Instruction Set Computer (CISC) T Fb. MSP430 has 16 general purpose registers T Fc. We should leave the unused pins floating T Fd. The watchdog timer (WDT) will reset the system at a specified rate T Fe. In up mode, Timer A will count to the data stored in register TAR T Ff. In continuous mode, Timer A will count to the number stored in register TACCRO Fg. In MSP430, Timer A has 3 capture/compare channels T Fh. Interrupt is generated by hardware while subroutine is a method used in software. i. Nonmaskable interrupt can be suppressed by clearing GIE bit in status register T F F j. The interrupt flag of port 1, P1IFG will reset automatically after an interrupt request is put
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