Task 3 130 marks) Create a Programmable Logic Array (PLA) with 2 data inputs (A, B) and 4 data outputs (W, X, Y, Z) that implements the following functions: Output SS, Function 00 Q = A XOR B Q = A XNOR B Q = A NAND B Q = A NOR B W 01 z Then, use a 4-to-1 multiplexer and operation selection bits S, and S, to propagate only the selected PLA output to the main circuit output designated as Q. Draw the circuit diagram that shows the implementation of the PLA and 4-to-1 multiplexer. You are restricted to use only AND, OR and NOT gates, thus make sure that you show correct functions and truth tables for each output