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Suppose that you have a 4-way associative cache. In one of the sets of the cache, there is a stream of accesses to the following block addresses. Determine whether each of the access would result in a cache hit, a cache miss, or a cache miss and replacement. Show what block is replaced for LRU (Least Recently Used) replacement policy. For the first few accesses, fill the cache starting from way/line 00, 01, 10, and then 11.

For each cell, use the following notation: H for hit, M for miss, MR-x for miss and replace block x.

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eplacement. Show what block is replaced for LRU (Least Recently Used) replacement policy. For the first few accesses, fill the cache starting from way/line 00, 01, 10 , and then 11. or each cell, use the following notation: " H " for hit, " M " for miss, "MR-x" for miss and replace block x