The following algorithm is used to find the integer square root for an input integer number X

$[$Ex$1$: if X in $\{4,5,6,7,8\},$ then the result integer square root Y $=2$

$[$Ex$2$: if X in $\{9,10,11,12,13,14,15),$ then the result integer square root Y $=31$

Input: X $($n$-$bit integer number$)$

Output: Y $=$ sqrt$($X$)$

Step$1$: Initialization

A $=$ X $($Input Data$)$

Q $=1$

B $=3$

step$2$: Q $=$ Q $+$ B

step$3$: B $=$ B $+2$

repeat the last two steps $($step $2$ and step $3)$ until Q $>$ A

step$4$: Shift B one bit to the right $($a logical shift$)$

step$5$: Y $=$ B $-1($The result$)$

Complete the following Verilog code to provide a behavioral implementation for this algorithm.

module SQRT$\_$Calculator $($

input CLK$,$

input $[9$:$0]$ X$,$

output reg $[4$:$0]$ Y

$)$;

Your design should include the following pins:

$1.$ CLK: $($negative edge trigger input clock$)$

$2.$ X: The input number $(10$ bits$)\mathrm{.}3.$ Y: The result square root $(5$ bits$)($Hint: define the variables A$,$ B$,$ and Q to be of size $11)$

Notes:

$1).$ if X in $\{2^$n$,.......,(2^($n$+1))\}$ then the result integer square root Y $=$ sqrt$(2^$n$)$

$[$Ex$1$: if X in $\{4,5,6,7,8\},$ then the result integer square root Y $=2$

or

if X in $\{(2^$n$)+1),.......((2^($n$+1))-1)$ then the result integer square root Y $=$ sqrt$((2^($n$+1)).$

$[$Ex$2$: if X in $\{9,10,11,12,13,14,15),$ then the result integer square root Y $=31$

$3).$Use behavioral description

$4).$DO NOT use the following operators: $/,*,\%$

$5).$DO NOT use an algorithmic state machine.

$6).$The calculation should be synchronous with the clock $($the result should be calculated in

a single clock cycle at the falling edge of the input clock$)$

You have to use EDA Playground for this assignment

You have to submit two files:

$1.$ A Verilog code to implement your Design.

$2.$ A testbench file to simulate and test your design:

a$.$ Set the clock period to be $2$ns$.$

b$.$ You have to cover all the possible cases for the input data $(1024$ different cases$)$

c$.$ For each case you have to:

i$.$ Select the value for X $($from $0$ to $1023)$

ii$.$ Wait for two clock cycles

part of the solution is:

the main design:

module SQRT$\_$Calculator $($

input CLK$,$

input $[9$:$0]$ X$,$

output reg $[4$:$0]$ Y

$)$;

reg $[10$:$0]$ A;

reg $[10$:$0]$ B;

reg $[10$:$0]$ Q;

always @$($negedge CLK$)$ begin

A $<=$ X;

Q $<=1$;

B $<=3$;

while $($Q $<=$ A$)$ begin

Q $<=$ Q $+$ B;

B $<=$ B $+2$;

end

B $<=$ B $>>1$;

Y $<=$ B $-1$;

end

endmodule

the testbench is:

$`$timescale $1$ns$/1$ps

module testbench;

reg CLK;

reg $[9$:$0]$ X;

wire $[4$:$0]$ Y;

integer i;

SQRT$\_$Calculator uut $(.$CLK$($CLK$),.$X$($X$),.$Y$($Y$))$;

initial begin

CLK $=0$;

forever #$1$ CLK $=$ ~CLK;

end

initial begin

$dumpfile$("$dump$.$vcd$")$;

$dumpvars$(1)$;

for $($X $=0$; X $<1024$; X $=$ X $+1)$ begin

#$2$;

$display$("$X $=\%$d$,$ Y $=\%$d$",$ X$,$ Y$)$;

end

end

endmodule

please correct any error in this code fast