The following four lines of code can be reduced to exactly three lines of code that produce the same output for all possible initial register values. Basically, you are reorganizing the code to put a useful instruction in the delayed branch slot. Every line must be correct to get credit for this part. You do not need to draw a pipeline diagram. Assume a correct computer that does not need any nop except after a branch or jump. Loop: lw $2, 64($3) addi $3, 4($3) beq $3, $4, Loop nop Be sure to walk through this code and your code for initial conditions: $3 has 4, $4 has 8, memory location 68 has 16, memory location 72 has 32, memory location 76 has 64. The results must be the same as the given code and your code. Then check $3 has 12, $4 has 8, same memory. The results must be the same as the given code and your code. The "C" code could be something like: loop: r2=mem[64+r3]; /* r2, r3, r4 convert from variables to registers */ r3+=4; if(r3==r4) goto loop; /* cases are r3==r4-4 at start, else any r3 */ /* can only go to loop once or zero times */ This exercise is demonstrating that the "delayed branch slot" does not have to contain a nop. Your assembly code will not have a nop but will reorder and change the instructions to have some other instruction after the beq.