The following logic function is given as a sum of minterms: F(A, B, C, D) = {A,B,C,D (1, 5, 6, 7, 10, 11). a) Give all static-1 hazard input pair(s) where a transition between them would create a timing hazard. [2 pts] b) Draw the timing diagram showing the hazard for one of the cases. Assume ALL gate delays are equal. (show the diagram starting from 1 -> 0 (that is, the input signal goes from 1 to 0)). [3 pts] c) Obtain the hazard-free logic expression of F. [1 pt] The following logic function is given as a sum of minterms: F(A, B, C, D) = {A,B,C,D (1, 5, 6, 7, 10, 11). a) Give all static-1 hazard input pair(s) where a transition between them would create a timing hazard. [2 pts] b) Draw the timing diagram showing the hazard for one of the cases. Assume ALL gate delays are equal. (show the diagram starting from 1 -> 0 (that is, the input signal goes from 1 to 0)). [3 pts] c) Obtain the hazard-free logic expression of F. [1 pt]