The following logical instructions are not included in the RISC-V instruction set. If the value of x7=0xABBA61 FC and the value of x8=0x013CDE97, what is the result of x6 in each case? Implement these logical instructions using RISC-V instructions and show the bit-level representation of these instructions. a. andn x6, x7, x8 //bitwise AND of t2, !t3 b. xnor x6, x7, x8 //bitwise exclusive NOR Problem 4: Translate each of the following C code segments to RISC-V assembly code. Assume that the values a, b, and i are in registers x10, x11, x12 respectively. Also, assume that register x20 holds the base address of the array D. How many RISC-V instructions does it take to implement the C code? If the variables a and b are initialized to 0 and 10 and all the elements of array D are initially 0, what is the total number of RISC-V instructions that is executed to complete the loop? a. for (i=0; i