The following register transfers are to be executed in the system of the below figure for each transfer specify: Bus Memony unit 4096 x 16 7 Address Wate Read AR LD INR CLR PC 2 INR CLR 3 LD INR CLR AdderHE AC logic LO INR CLR INPR LD INR CLR PUTRA Clock LD 16-512 commonBUS 1- The binary value that must be applied to the select input SOS1S2 2- The register whose LD control must be active - if any