The illustrated device receives a serial number at the input, at most insignificant bit first - LSDF (least significant digit first), and calculates the product the input number with the value 9, serial, in LSDF form. Implement using Verilog language, spmul_t9 module using the instantiation method.

- - 1 spmul_t9 sin 1 1 1 1 sreg_3b clk q S rst_b s[0] 1 sadd clk N z clk rst_b irst_b ! - - 1 1 1 1 - - 1 1 - 1 - - 1 spmul_t9 sin 1 1 1 1 sreg_3b clk q S rst_b s[0] 1 sadd clk N z clk rst_b irst_b ! - - 1 1 1 1 - - 1 1 - 1