The outputs of four registers, W, X, Y, and Z, are connected through 4- to-1-line multiplexers to the inputs of a fifth register, R. Each register is eight bits long. The required transfers are dictated by four control variables a through d, as follows:

a: R <- W

b: R <- X

c: R <- Y

d: R <- Z

The control variables are mutually exclusive, which means that only one variable is equal to 1 at any given time, while the other three are equal to 0. Draw a block diagram showing the hardware implementation of the register transfers. Include the connections necessary from the four control variables to the selection inputs of the multiplexers and to the load input of register R.