Use $5$ step systematic design procedure to design a $2$bit by $2$bit multiplier. It should take put, P$1$:$0$ and O O $,$ X$1$:$0$ Y$1$:$0$ as inas output where is an overflow bit. Save the circuit as c$7.$cct $.$ Your CCT file must show the component being tested using hex keyboards and displays as well as binary probs.