Using K-map, Simplify the following Boolean expression in the SOP form. F(A,B,C,D) = (A'B'CD' + A'BC'D + AB'CD'+ABC'D ) + D(A'B'C'D' +A'B'CD+ A'BCD +AB'CD+ABC'D' + ABCD) Consider the logic circuit given below, if the same circuit has to be implemented or replaced by only NAND gates? How many NAND gates will be required and why? Give reason. 0 Draw the Logic Symbol of a 4 bit Parallel Full Adder