Using logicworks

Draw a circuit to have an AND gate with two inputs (the 2-input AND gate can be obtained from the Simulation Gate library). Connect one of the input to a clock and name it as x. Name the other input as y and connect it to a binary switch. Name the output as z so that you can examine the signals changes on these lines. 1. (a) Put the switch to 1 and you will see the output will be same as the input x subject to the gate-delay of the AND gate. (b) Make the rising edge of x as the reference line in the simulation. (c) Change the gate-delay of the AND gate to 0, 3, 5. Observe the output changes with respect to the changes of input x. 2. Draw the circuit to implement the Boolean function as follows f (a, b, c, d(a' + b)'c d (b' ac) according to the expression directly Connect b, c and d to binary switches and make them to be 0, 1 and 0, respectively. Connect a to a clock. (a) According to your simulation, how much time does it take for the change of a to be reflected in the output f? (b) Change the gate delays of all the gates along the path from a to f to 0, 2 and 4. Verify that the total delays from a to f you observed are correct 3. Simplify the same Boolean function f (a, b, c, d (a' + b)'c+d(b' ac) to be a sum of minterms. Implement the sum of minterms with a network of gates. 4. Put the two implementations above of the same Boolean function f (a, b, c, d) (a' + b)'c + d(b' ac) to another circuit (you can do it by using copy-and-paste). Remove the all the binary switches. Use a single hexadecimal keyboard to provide input to the a, b, c and d of both implementations. Be sure to use two different names for the two outputs Draw a circuit to have an AND gate with two inputs (the 2-input AND gate can be obtained from the Simulation Gate library). Connect one of the input to a clock and name it as x. Name the other input as y and connect it to a binary switch. Name the output as z so that you can examine the signals changes on these lines. 1. (a) Put the switch to 1 and you will see the output will be same as the input x subject to the gate-delay of the AND gate. (b) Make the rising edge of x as the reference line in the simulation. (c) Change the gate-delay of the AND gate to 0, 3, 5. Observe the output changes with respect to the changes of input x. 2. Draw the circuit to implement the Boolean function as follows f (a, b, c, d(a' + b)'c d (b' ac) according to the expression directly Connect b, c and d to binary switches and make them to be 0, 1 and 0, respectively. Connect a to a clock. (a) According to your simulation, how much time does it take for the change of a to be reflected in the output f? (b) Change the gate delays of all the gates along the path from a to f to 0, 2 and 4. Verify that the total delays from a to f you observed are correct 3. Simplify the same Boolean function f (a, b, c, d (a' + b)'c+d(b' ac) to be a sum of minterms. Implement the sum of minterms with a network of gates. 4. Put the two implementations above of the same Boolean function f (a, b, c, d) (a' + b)'c + d(b' ac) to another circuit (you can do it by using copy-and-paste). Remove the all the binary switches. Use a single hexadecimal keyboard to provide input to the a, b, c and d of both implementations. Be sure to use two different names for the two outputs