Using the circuit layout and next state table values, use LOGISM to design state circuits using D, JK, and T flip-flops that shows the output sequence of 8d4a5923f8efb49e. Please share screenshot from logism or if you can share the file for the circuits please. Please help ASAP, I will up vote!!

halt RAM 16 x 4 CTR4 R M1 [load] 0 M2 count] M3 yp] 3CT=OXF M4 down) 4CT=0 G5 2.3.5+/C6 2,4,5- } }ajno 0000 YABC 0000 M1 Write Enable] M2 toutput Enable] C3 0 A,1,3D A.2.3 -000000000000 A.1.30b00000 11,6D 1.6D 1.6D 1.6D A 2,3 2 A 23 A 1,3D A,1,3D A,2,3 x CBAY ABCx DA DSQ DSQL DSQ C 5 ge on xCBA O 0 1 present state Next-state IPA DB PcJAKA JB KB Jekel ARC X YA " o o o o Ilo 1 I XOXIX 1 110 1 1 0 IXI XOXI 10 0 O 0 1 1100 1 0 1 X X X 1 0011 1 Ol00 0 xxx 10 010 0 0 0 1 0 1 1 O XXO X10 0 0 1 101 1 XXIII 1 ) 0 1 0 1 1001 1 XX1 X 11 1 0 11 1 1 XXoXot 0 1 0 0 0 D 00 1 0 X II XOX 1 1 1 0 1 0 0 0 1 X 10 XX1 0 1 0 0 0 1 0 0 1 10XX01 0 0 10 1 1 011 0 0 XOOXX 10 0 1 11 011 1 1 XOXOXO 0 1 0 0 0 0 XXIOXI 0 lll00 0 0 0 1x XOXO 1 0 0 101 101 0 0 0 0 D-FF JK -FF TFF o OX 0 o 1 0 1 0 ( 1 10 DIXI 0 CS Scanned' with CamScanner halt RAM 16 x 4 CTR4 R M1 [load] 0 M2 count] M3 yp] 3CT=OXF M4 down) 4CT=0 G5 2.3.5+/C6 2,4,5- } }ajno 0000 YABC 0000 M1 Write Enable] M2 toutput Enable] C3 0 A,1,3D A.2.3 -000000000000 A.1.30b00000 11,6D 1.6D 1.6D 1.6D A 2,3 2 A 23 A 1,3D A,1,3D A,2,3 x CBAY ABCx DA DSQ DSQL DSQ C 5 ge on xCBA O 0 1 present state Next-state IPA DB PcJAKA JB KB Jekel ARC X YA " o o o o Ilo 1 I XOXIX 1 110 1 1 0 IXI XOXI 10 0 O 0 1 1100 1 0 1 X X X 1 0011 1 Ol00 0 xxx 10 010 0 0 0 1 0 1 1 O XXO X10 0 0 1 101 1 XXIII 1 ) 0 1 0 1 1001 1 XX1 X 11 1 0 11 1 1 XXoXot 0 1 0 0 0 D 00 1 0 X II XOX 1 1 1 0 1 0 0 0 1 X 10 XX1 0 1 0 0 0 1 0 0 1 10XX01 0 0 10 1 1 011 0 0 XOOXX 10 0 1 11 011 1 1 XOXOXO 0 1 0 0 0 0 XXIOXI 0 lll00 0 0 0 1x XOXO 1 0 0 101 101 0 0 0 0 D-FF JK -FF TFF o OX 0 o 1 0 1 0 ( 1 10 DIXI 0 CS Scanned' with CamScanner