vhdl code in Quarus program

to design processor:

Implement 1-bus processor with a hardwired control unit: The processor has the following characteristics

Instructions: Add, Or, Sub, Addi, Ori, Xor, Ld, St, La, Br, Brzr, Stop, Nop, Shr.

Data bus is 24 bits

Address bus is 16 bits

16 general purpose registers.

Shift instruction should be executed within one clock cycle