What is the single cycle clock rate given the following information?

1 ns 1 ns 1 ns Instruction Type Instruction Fetch Register Read and Decode ALU Operation Data Memory Access Register Write 2 ns R-format lui lw SW bne Assume that our MIPS instruction subset has the above instructions and latencies. 2 ns 2 ns 2 ns 2 ns 2 ns 1 ns 1 ns 1 ns 1 ns 1 ns 4 ns 4 ns 2 ns 2 ns 2 ns