which is$/$are correct?

$*$

Paging is another implementation of Virtual Memory.

the on$-$chip cache speeds up execution time

Data on the tape are structured as a number of parallel tracks running lengthwise

All machine languages include numeric data types

Trend is toward split caches at the L$1$ and unified caches for higher levels

I$/$O channel has complete control over I$/$O operations.

a TLB Miss causes a Page fault.

A Segment is a logically related contiguous allocation of words in MM$.$

Every Memory access requested by CPU will refer memory once when using paging.

A segment table is not required to be maintained with the details of those segments in MM and their status.Paging is another implementation of Virtual Memory.

There is no need for the whole program code or data to be present in Physical memory

Tape systems use the same reading and recording techniques as disk systems

Peripherals often use different data formats and word lengths than the computer to which they are attached.

All memory references by a process are all physical and dynamically translated by hardware into physical addresses.

the physical view of the storage is contiguous.

Both Cache and Virtual Memory are based on the Principle of Locality of Reference.

When VM is used, the address fields of machine instructions contain virtual addresses

As the block size increases the hit ratio will at first decrease because of the principle of locality, The hit ratio will begin to decrease

with paging$/$segmentation$,$ process can not be broken up into pieces and loaded as necessitated.

Virtual Memory $($VM$)$ Concept is similar to the Concept of Cache Memory.

the on$-$chip cache decreases overall system performance

As the block size decreases more useful data are brought into the cache

The data transfer rate of peripherals is often much slower$/$ faster than that of the memory or processor.

when using virtual memory, there is the ability to run programs that are larger than the size of physical memory.

A TLB is a fully associative cache of the Page$/$segment Table.

Faster hard drives will tend to make more noise than those that are slower.

The on$-$chip cache reduces the processor$$s external bus activity.

The storage in secondary memory need not be contiguous.

Multipoint external interfaces are used to support external mass storage devices.

Neither the data or program need to be present in contiguous locations of Physical Main Memory.

The I$/$O channel represents an extension of the DMA concept.

The operation of the processor is determined by the instructions it executes.

Virtual Memory provides an illusion of limited memory being available to the Processes$/$ Programmers.

A system control instruction may read or alter a control register.