which is incorrect?

$*$

A mechanism is needed to ensure that any accessed cache block contains valid information.

The narrower the head, the closer it must be to the platter surface to function

SSD do not suffere from fragmentations because the lack of a physical read head.

it is very easy to arrive at a single $$optimum$$ cache size.

A hard drive requires time to speed up to operating specs, and it will continue to be slower than an SSD during normal use.

HDDs have a limit to how small they can be manufactured.

The DMA module transfers the entire block of data, one word at a time, directly to or from memory, without going through the processor.

To achieve high speed, an algorithm must be implemented in software

With a new generation of high$-$speed serial interfaces, parallel interfaces are becoming much less common.

The closer the head is to the disk the less the risk of error from impurities or imperfections

when the processor issues a command, each I$/$O module must interpret the address lines to determine if the command is for itself

The larger the cache, the smaller the number of gates involved in addressing the cache.

A machine may offer a variety of addressing modes

SSDs are more expensive than hard drives in terms of dollar per gigabyte.

SDD performance has a tendency to slow down as the device is used

For most instruction sets only one instruction format is used.

SSD launches and runs apps faster than HDD

in SSD$,$ data can be stored anywhere without penalty.

For direct mapping there is only one possible line for any particular block and no choice is possible

The validity of the information in a cache block can be checked via the use of a single bit for each cache block

As logic density has decreased it has become possible to have a cache on the same chip as the processor

variable length instructions increase the complexity of the processor

SSDs are often much smaller than HDDs

The interface to a peripheral from an I$/$O module must be tailored to the nature and operation of the peripheral.

large caches tend to be slightly faster than small ones