With the use of a negative-edge-triggered JK flip-flops, design a synchronous counter that progresses through the binary sequence 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 and then repeats as follows: Draw the state diagram for the counter, Construct the excitation table for the counter, Using Karnaugh maps, obtain minimized expressions for the inputs of the flip-flops, Draw the circuit diagram for the counter