Failure times of silicon wafer microchips. Researchers at National Semiconductor experimented with tin-lead solder bumps used to

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Failure times of silicon wafer microchips. Researchers at National Semiconductor experimented with tin-lead solder bumps used to manufacture silicon wafer integrated circuit chips. The failure times of the microchips (in hours) was determined at different solder temperatures (degrees Celsius). The data for one experiment are given in the table. The researchers want to predict failure time 1y2 based on solder temperature 1x2.

a. Construct a scatterplot for the data. What type of relationship, linear or curvilinear, appears to exist between failure time and solder temperature?

b. Fit the model, E1y2 = b0 + b1x + b2x2 , to the data. Give the least squares prediction equation.

c. Conduct a test to determine if there is upward curvature in the relationship between failure time and solder temperature. (Use a = .05.) Temperature (°C) Time to Failure (hours) 165 200 162 200 164 1,200 158 500 158 600 159 750 156 1,200 157 1,500 152 500 147 500 149 1,100 149 1,150 142 3,500 142 3,600 143 3,650 133 4,200 132 4,800 132 5,000 134 5,200 134 5,400 125 8,300 123 9,700 Source: S. Gee and L. Nguyen, “Mean Time to Failure in Wafer Level-CSP Packages with SnPb and SnAgCu Solder Bumps,” International Wafer Level Packaging Conference, San Jose, CA, November 3–4, 2005 (adapted from Figure 7). © 2005 by Surface Mount Technology Association (SMTA). Used by permission of the Surface Mount Technology Association (SMTA).

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Statistics For Business And Economics

ISBN: 9781292413396

14th Global Edition

Authors: James McClave, P. Benson, Terry Sincich

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