Design a common-emitter circuit whose output is capacitively coupled to a load resistor \(R_{L}=10 \mathrm{k} \Omega\). The minimum small-signal voltage gain is to be \(\left|A_{v}\right|=50\). The circuit is to be biased at \(\pm 5 \mathrm{~V}\) and each voltage source can supply a maximum of \(0.5 \mathrm{~mA}\). The parameters of the available transistors are \(\beta=120\) and \(V_{A}=\infty\).