Double-rail self-checking checker Achecker receives two groups of inputs al, az and bl , bz, and delivers two outputs Cl and Cz (cf. Figure 16. 14-a). Each pair of signals belongs to the double-rail code, i.e. it is defined by the correct configurations: {Ol, 1O}.

The vectors 00 and 11 thus correspond to error signaling.

We assume a classical single stuck-at fault model.

1. Show that the logic structure in AND and OR gates proposed in Figure 16.14-b is code-disjoint and self-testing. For the second property, we can use the method studied in Chapter 13 for the search of the faults covered by an input vector.
2. Now we put together several of the previous cells in order to treat the double-rail codes of more than two pairs of bits. Study the conditions on the input vectors for which a network of cells has the property of being a total self-checking checker.

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a az a a b b b b Checker C1 C2 C1 Cz a) checker b) internal structure Figure 16.14. Double-Rail self-checking checker