Scan Design In this exercise, we refer to the technique of LSSD presented in paragraph 14.4.3. We assurne that the circuit considered possesses 4 internal variables, and that the combination part is tested with a sequence of lOtest vectors noted VI to VlO.

Draw a symbolic time diagram that represented the different steps of the test of this circuit, by showing the evolution of the signals HE, HM, Shijt, Scan In and Scan Out.