The circuit in Figure P714 is in the zero state when the input vS(t)100 u(t) is applied.
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The circuit in Figure P7–14 is in the zero state when the input vS(t)¼100 u(t) is applied. IfC¼0.01 mFandR¼100 kV, find vO(t) for t 0. Identify the forced and natural components in the output.
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Related Book For
The Analysis And Design Of Linear Circuits
ISBN: 9781118214299
7th Edition
Authors: Roland E Thomas, Albert J Rosa, Gregory J Toussaint
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