The operation of a digital system is controlled by a clock waveform that provides a standard timing reference. At its source a clock waveform can be described by a rectangular pulse of the form

In this example the pulse amplitude is VA = 5 V and the pulse duration is T = 10 ns.
This clock pulse drives a digital device that can be modeled by the circuit in Figure 7–18(a). In this model υSðtÞ is the rectangular clock pulse defined above and υðtÞ is the clock waveform as received at the input to the digital device. The presence of a clock pulse at the device input will be detected only if υðtÞ exceeds a specified logic “1” threshold level.
Find the zero-state response of the voltage υðtÞ when RC = 10 ns. Will the clock pulse be detected if the logic “1” threshold level is 3.7 V?

Transcribed Image Text:

vs(t)=VAu(t)-u(t-T)]