Given the following sequence of assembly language instructions for a CPU with multiple pipelines, indicate all data
Question:
Given the following sequence of assembly language instructions for a CPU with multiple pipelines, indicate all data hazards that exist between instructions.
I1: Add R2, R4, R3 ;R2 = R4 + R3
I2: Add R1, R5, R1 ;R1 = R5 + R1
I3: Add R3, R1, R2 ;R3 = R1 + R2
I4: Add R2, R4, R1 ;R2 = R4 + R1
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Related Book For
Computer Architecture Fundamentals And Principles Of Computer Design
ISBN: 9781032097336
2nd Edition
Authors: Joseph D. Dumas II
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