For the purpose of this exercise, we assume that we have a 512- byte cache with 64-byte

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For the purpose of this exercise, we assume that we have a 512- byte cache with 64-byte blocks. We will also assume that the main memory is 2 KB large.We can regard the memory as an array of 64-byte blocks: M0, M1,…, M31. Figure B.30 sketches the memory blocks that can reside in different cache blocks if the cache was direct-mapped.

a. Show the contents of the table if the cache is organized as a fullyassociative cache.

b. Repeat part (a) with the cache organized as a four-way set associative cache.

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Computer Architecture A Quantitative Approach

ISBN: 9780128119051

6th Edition

Authors: John L. Hennessy, David A. Patterson

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